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Real-time digital signal processing: implementations, ... changes in the input signal is limited by its internal clock rate, so that it may be slow to

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The TMS320C55x provides overflow flags that indicate whether or not an arithmetic
operation has exceeded the capability of the corresponding register. The overflow flag
ACOVx, (x 0, 1, 2, or 3) is set to 1 when an overflow occurs in the corresponding
accumulator ACx. The corresponding overflow flag will remain set until a reset is
performed or when a status bit clear instruction is implemented. If a conditional
instruction that tests overflow status (such as a branch, a return, a call, or a conditional
execution) is executed, the overflow flag is cleared. The overflow flags can be tested and
cleared using instructions.
3.6.3 Scaling of Signals
The most effective technique in preventing overflow is by scaling down the magnitudes
of signals at certain nodes in the DSP system and then scaling the result back up to the
original level. For example, consider the simple FIR filter illustrated in Figure 3.15(a).
Let xn 0:8 and xn À 1 0:6, the filter output yn 1:2. When this filter is
implemented on a fixed-point DSP hardware without saturation arithmetic, undesired
overflow occurs and we get a negative number as a result.
As illustrated in Figure 3.15(b), the scaling factor, b < 1, can be used to scale
down the input signal and prevent overflowing. For example, when b 0:5 is used,
we have xn 0:4 and xn À 1 0:3, and the result yn 0:6. This effectively
prevents the hardware overflow. Note that b 0:5 can be implemented by right shifting
1 bit.
If the signal x(n) is scaled by b, the corresponding signal variance changes to b
2
s
2
x
.
Thus the signal-to-quantization-noise ratio given in (3.5.8) changes to
SNR 10 log
10
b
2
s
2
x
s
2
e
2
3
4:77 6:02B 10 log
10
s
2
x
20 log
10
b:
3:6:2
Since we perform fractional arithmetic, b < 1 is used to scale down the input signal. The
term 20 log
10
b has negative value. Thus scaling down the amplitude of the signal
reduces the SNR. For example, when b 0:5, 20 log
10
b À6:02 dB, thus reducing
the SNR of the input signal by about 6 dB. This is equivalent to losing 1-bit in
representing the signal.
y(n)
+
+
0.8
0.9
z
-1
(a)
y(n)
+
+
0.8
0.9
x(n)
x(n)
x(n
-1)
x(n
-1)
b
z
-1
(b)
Figure 3.15 Block diagram of simple FIR filters: (a) without scaling, and (b) with scaling
factor b
OVERFLOW AND SOLUTIONS
105

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Summary :

Thus the signal-to-quantization-noise ratio given in (3.5.8) changes to SNR 10 log 10 b 2 s 2 x s 2 e 2 3 4:77 6:02B 10 log 10 s 2 x 20 log 10 b: 3:6:2 Since we perform fractional arithmetic, b < y(n) + + 0.8 0.9 z -1 (a) y(n) + + 0.8 0.9 x(n) x(n) x(n -1) x(n -1) b z -1 (b) Figure 3.15 Block diagram of simple FIR filters: (a) without scaling, and (b) with scaling factor b OVERFLOW AND SOLUTIONS 105


Tags : signal,scaling,log,down,corresponding,result,snr,filter,used,flag,input,example,implemented





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