Real-time digital signal processing: implementations, ... changes in the input signal is limited by its internal clock rate, so that it may be slow to
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such as cutoff and bandwidth frequencies specified for the digital filter can be used
directly in the design of the analog filter.
Example 6.6: Consider the analog filter expressed as
Hs
0:5s 4
s 1s 2
1:5
s 1
À
1
s 2
:
The impulse response of the filter is
ht 1:5e
Àt
À e
À2t
:
Taking the z-transform and scaling by T yields
Hz
1:5T
1 À e
ÀT
z
À1
À
T
1 À e
À2T
z
À1
:
It is interesting to compare the frequency response of the two filters given in Example
6.6. For the analog filter, the frequency response is
HV
0:54 jV
1 jV2 jV
:
For the digital filter, we have
H!
1:5T
1 À e
ÀT
e
Àj!T
À
T
1 À e
À2T
e
Àj!T
:
The DC response of the analog filter is given by
H0 1,
6:3:11
and
H0
1:5T
1 À e
ÀT
À
T
1 À e
À2T
6:3:12
for the digital filter. Thus the responses are different due to aliasing at DC. For a high
sampling rate, T is small and the approximations e
ÀT
% 1 À T and e
À2T
% 1 À 2T are
valid. Thus Equation (6.3.12) can be approximated with
H0 %
1:5T
1 À 1 À T
À
T
1 À 1 À 2T
1:
6:3:13
Therefore by using a high sampling rate, the aliasing effect becomes negligible and the
DC gain is one as shown in (6.3.13).
258
DESIGN AND IMPLEMENTATION OF IIR FILTERS
Summary :
1:5T 1 À e ÀT e Àj!T À T 1 À e À2T e Àj!T : The DC response of the analog filter is given by H0 1, 6:3:11 and H0 1:5T 1 À e ÀT À T 1 À e À2T 6:3:12 for the digital filter.
Tags :
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