e X3 and X5 module families feature high performance analog and digital ... Digital IO. Front panel 64 single-ended or 32-bit LVDS. 44 bits (J16) Cloc

>1 GB/s, 8-lane PCIe Host Interface A/D Four 130 MSPS 16-bit A/D channels DDCs with 8 to 48 channels +/-1V, AC-coupled, 50 ohm, SMA inputs D/A none Digital IO 16 bits (J16) rx Dual D/A 16-bit 1 GSPS DAC5682Z Ext Clk Trigger Dual D/A 16-bit 1 GSPS DAC5682Z App FPGA Xilinx Spar tan3A-DSP 1.8M gate PLL / Clk Distribution X5-TX PCI Express XMC Module Ideal for Wireless Transmitter, High Speed Arbitrary Waveform Generation Features A/D none D/A +/-1V output range Digital IO 16-bits (J16) Ext Clk App FPGA Xilinx Vi rt e x5 LX/SX PLL/Clock Distribution A/D 16-bit 200 MSPS Trigger X5-RX PCI Express XMC Module Ideal for Wireless IF Receiver and Processor, Multi-channel RADAR Features A/D +/-1V input range D/A none Digital IO 16-bits (J16) IP Cores for SDR 16-4096 channels A/D 8-bit 1.5 GSPS Ext Clk Trigger A/D 8-bit 1.5 GSPS PLL/Clock Distribution App FPGA Xilinx Vi rt e x5 LX/SX X5-GSPS PCI Express XMC Module Ideal for Wireless Receiver, WLAN, WCDMA, WiMAX front end, RADAR, Electronic Counter Measures (ECM), Electronic Warfare, High Speed Data Recording, Spectral Analysis, IP developments Features A/D (National ADC08D1520) +/-1V, 50 ohm, SMA D/A none Digital IO 16-bits (J16) IP Cores for SDR 16-4096 channels