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e X3 and X5 module families feature high performance analog and digital ... Digital IO. Front panel 64 single-ended or 32-bit LVDS. 44 bits (J16) Cloc

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44
Innovative Integration | 805.578.4260 | www.innovative-dsp.com
IP-PSK DEMOD
IP-FSK DEMOD
IP-TINY DDS
ii_xlfft
ii_psk
ii_fsk
IP-RI-MDDC16
IP-RI-MDDC32
IP-RI-CHTU128/256
IP-RI-CHTU32/4096
X5-400M with 16 DDC channels
X5-400M with 32 DDC channels
X5-400M with 128 or 256 DDCchannels
X5-400M with 32 to 4096 DDC channels
PSK demodulator, N=2,4,8, pi/4;
FSK demodulator
Tiny DDS, 1/3 size of Xilinx DDS with equal SFDR
IP core for 64K to 1M complex FFT, 1-D or 2-D
IP core for BPSK, QPSK, 8PSK demodulation up to 50 Mbps
IP core for FSK demodulation
IP core for 16 independent DDC channels, netlist version, Virtex SX95T target
IP core for 32 independent DDC channels, netlist version, Virtex SX95T target
IP core for 128 or 256 independent DDC channels, netlist version, Virtex SX95T target
IP core for 32 to 4096 equi-spaced DDC channels, netlist version, Virtex SX95T target
X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-MDDC16 logic core installed, BIT file only
X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-MDDC32 logic core installed, BIT file only
X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-CHTU128/256 logic core installed, BIT file only
X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-CHTU32/4096 logic core installed, BIT file only
Product
Description
Digital
Downconversion
Up to 4096
Demodulation
FSK, PSK, MSK
PCI Express Bus
IF wideband
channel 0
IF wideband
channel 1
X5 Digitizer Module
IP Cores for SDR Applications
Innovative has teamed with R-Interface
to provide IP focused on So ware Digi-
tal Radio IP cores. ese cores provide
essential front-end signal processing for
digital down-conversion, channelizing,
and demodulation that are the core of
any modern SDR application. ese
cores are also available either integrated
into X5 family modules, providing o -
the-shelf solutions for wireless, RA-
DAR and instrumentation applications.
Wireless IP Cores
High performance FPGA cores for
channelization, downconversion, and
demodulation
Embedding channelizers and demodulation into FPGAs increases channel density, improves exibility, and reduces system cost.







Summary :

FSK demodulator Tiny DDS, 1/3 size of Xilinx DDS with equal SFDR IP core for 64K to 1M complex FFT, 1-D or 2-D IP core for BPSK, QPSK, 8PSK demodulation up to 50 Mbps IP core for FSK demodulation IP core for 16 independent DDC channels, netlist version, Virtex SX95T target IP core for 32 independent DDC channels, netlist version, Virtex SX95T target IP core for 128 or 256 independent DDC channels, netlist version, Virtex SX95T target IP core for 32 to 4096 equi-spaced DDC channels, netlist version, Virtex SX95T target X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-MDDC16 logic core installed, BIT file only X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-MDDC32 logic core installed, BIT file only X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-CHTU128/256 logic core installed, BIT file only X5-400M w/SX95T FPGA, D/A clk: PLL (interpolating), IP-RI-CHTU32/4096 logic core installed, BIT file only Product Description Digital Downconversion Up to 4096 Demodulation FSK, PSK, MSK PCI Express Bus IF wideband channel 0 IF wideband channel 1 X5 Digitizer Module IP Cores for SDR Applications Innovative has teamed with R-Interface to provide IP focused on So ware Digi- tal Radio IP cores.


Tags : x5400m,channels,ddc,demodulation,cores,fpga,pll,wsx95t,bit,file,logic,installed,netlist





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