S3C6410_CIRCUIT DESIGN GUIDE REV 1.00
2. MEMORY MAP
2.1 Maximum Address range of the Memory Port0
Data pin [26:16] of memory port 1 can be used as Address pin [26:16] of memory port 0 by configuration from
system controller (MEM_SYS_CFG[7])
Address Range of the SROMC
Address Width
Max. Size
Memory Port 1: 32bit Bus width DRAM
20bit
1MB
Memory Port 1: 16bit Bus width DRAM
27bit
128MB
2.2 Maximum Address range of the Memory Port1
1) 16bit Data Bus Width DRAM : 1Gb / Chip Select
2) 32bit Data Bus Width DRAM : 2Gb / Chip Select
Start
Address
End
Address
Int.
ROM
SROM
Ctrl.
OneNAND
Ctrl. 0
OneNAND
Ctrl. 1
DRAM
Ctrl 1
0x00000000
0x07FFFFFF
O
1
O
1
O
1
- -
0x08000000
0x0BFFFFFF
O - - - -
0x0C000000
0x0FFFFFFF
- - - - -
0x10000000
0x17FFFFFF
-
O - - -
0x18000000
0x1FFFFFFF
-
O - - -
0x20000000
0x27FFFFFF
-
O
2
O
2
- -
0x28000000
0x2FFFFFFF
-
O
2
O
2
-
0x30000000
0x37FFFFFF
-
O - - -
0x38000000
0x3FFFFFFF
-
O - - -
0x40000000
0x47FFFFFF
- - - - -
0x48000000
0x4FFFFFFF
- - - - -
0x50000000
0x5FFFFFFF
- - - - O
0x60000000
0x6FFFFFFF
- - - - O
1
Refer to Memory sub-system chapter(Refer to User's manual) for details.
2
This address range can be assigned to both SROM controller and OneNAND controller. The decision is made
by System Controller. Refer to Memory sub-system chapter for details. In case of OneNAND boot mode, It is not
used for SROM controller.
20
Summary :
1 DRAM Ctrl 1 0x00000000 0x07FFFFFF O 1 O 1 O 1 - - 0x08000000 0x0BFFFFFF O - - - - 0x0C000000 0x0FFFFFFF - - - - - 0x10000000 0x17FFFFFF - O - - - 0x18000000 0x1FFFFFFF - O - - - 0x20000000 0x27FFFFFF - O 2 O 2 - - 0x28000000 0x2FFFFFFF - O 2 O 2 - 0x30000000 0x37FFFFFF - O - - - 0x38000000 0x3FFFFFFF - O - - - 0x40000000 0x47FFFFFF - - - - - 0x48000000 0x4FFFFFFF - - - - - 0x50000000 0x5FFFFFFF - - - - O 0x60000000 0x6FFFFFFF - - - - O 1 Refer to Memory sub-system chapter(Refer to User's manual) for details.
Tags :
memory,address,dram,controller,width,bus,ctrl,onenand,port,range,srom,data,32bit