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Cadence® Mixed-Signal Circuit Design Environment User Guide

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Cadence Mixed-Signal Circuit Design Environment User Guide
The Mixed-Signal Interface
October 2003
15
Product Version 5.0
s
Run cosimulation of a circuit simulator and the Cadence
®
Verilog
®
-XL simulator to
simulate a mixed design.
s
Cross-probe from the schematics and display waveform results from both the circuit
simulator and the Verilog-XL simulator.
The
34510
license also allows you to
s
Create analog and mixed extracted cellviews from a layout.
s
Partition parasitics from extracted cellviews into analog and digital parts.
s
Simulate the analog parasitic part using the circuit simulator and annotating the digital
parasitic part as delays for Verilog-XL simulation.
s
Backannotate parasitic information obtained from the layout onto the schematic.
s
Cross-probe from the schematic description and display waveform results of the
simulation containing parasitics from the layout description.
To run mixed-signal simulations, you must also have licenses for the Cadence
®
analog design
environment and the Verilog-XL simulator. In addition, if you use the Virtuoso
®
schematic
composer, the Virtuoso layout editor, the Spectre circuit simulator, the cdsSpice simulator, the
SimVision debugger, or the AssuraTM interactive verification tools, you must have licenses for
those products too.
Note: To run mixed-signal simulations on CDBA using hspiceSVerilog, you may need
additional mixed-signal related licenses from Synopsys (Avant!).
The
34510
licenses is of the UHD (User+Host+Display) license type. This means that
starting two instances of a tool using the same user login, host CPU ID, and X-window
DISPLAY resource requires only one UHD license. However, starting two instances of a tool
using different user login, host, or DISPLAY resources requires two UHD licenses.
For example, if you run the analog circuit design environment locally, the Spectre simulator
remotely, and
verilog.vmx
locally but with a DISPLAY setting for
verilog.vmx
different
from the DISPLAY setting of the analog circuit design environment, you need two
34510
licenses. This is because the DISPLAY settings do not match. To overcome the problem with
mismatching DISPLAY settings, you can set and export the DISPLAY variable in your shell
initialization file (the
.cshrc
file for C-shell).
Design Examples
Mixed-signal design examples are available for you to try out the mixed-signal flow on CDBA.
They are located in







Summary :

Cadence Mixed-Signal Circuit Design Environment User Guide The Mixed-Signal Interface October 2003 15 Product Version 5.0 s Run cosimulation of a circuit simulator and the Cadence ® Verilog ® -XL simulator to simulate a mixed design. For example, if you run the analog circuit design environment locally, the Spectre simulator remotely, and verilog.vmx locally but with a DISPLAY setting for verilog.vmx different from the DISPLAY setting of the analog circuit design environment, you need two 34510 licenses.


Tags : simulator,display,circuit,design,mixedsignal,analog,licenses,layout,using,enironment,run,two,uhd





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