Cadence Mixed-Signal Circuit Design Environment User Guide
The Mixed-Signal Interface
October 2003
24
Product Version 5.0
Sample IE Macro Models
The
analogLib
design library contains the following IE macro model cells:
s
MOS_a2d
s
MOS_d2a
s
TTL_a2d
s
TTL_d2a
For details about each of the IE macro models, refer to Chapter 2, "Interface Element Macro
Models,".
Note: The analogLib views for the Spectre simulator have been enhanced to contain
inherited connections. Designs with inherited connections must use hierarchical netlisting. If
you have designs that use analogLib cells and want to use flat netlisting, you must use the
SpectreS or cdsSpice views.
The
ieLib
design library contains additional IE macro model cells. It is located in the
directory
your_install_dir/tools/dfII/samples/artist/mixSig/ieModels
The macro model text files reside in subdirectories specific to each simulator. Note that
socket-based simulators use
.S
files, whereas the SpectreVerilog simulator uses
.scs
files.
Nested Interface Element Models
Interface element primitives can reside within a subcircuit and within nested subcircuits of the
IE model. The nestlev parameter defines the nesting level of the interface element primitive.
The default value is 0.
The following sample shows an IE model for SpectreS,
TTL1_d2a.S
.
x&1 &2 C&1
.SUBCKT C$1 1
da&1 1 0 a2d nestlev=1 dest="&1" vl=&3 vh=&4 timex=&5
VDD 4 0 5
R1 4 3 4K
Q1 2 3 1 0 TN1
R2 2 4 40K
R3 2 0 20K
.MODEL TN1 NPN ...
.ENDS C&1
Summary :
Cadence Mixed-Signal Circuit Design Environment User Guide The Mixed-Signal Interface October 2003 24 Product Version 5.0 Sample IE Macro Models The analogLib design library contains the following IE macro model cells: s MOS_a2d s MOS_d2a s TTL_a2d s TTL_d2a For details about each of the IE macro models, refer to Chapter 2, "Interface Element Macro Models,".
Tags :
macro,model,interface,use,element,models,simulator,files,analoglib,design,cells,reside,tn1