Cadence Mixed-Signal Circuit Design Environment User Guide
Interface Element Macro Models
October 2003
38
Product Version 5.0
.A2D &1 &2 =(&3*1) =(&4*1) =(&5*1)
C&1 &2 0 0.1P
The cdsSpice IE macro model, MOS1_a2d, is a macro with a digital destination and an
analog terminal. The netlister passes interface element parameter values to instantiate the
macro.
In this example, the value of
NESTLEV
is not specified; by default, it is zero because the A2D
primitive is not nested inside a subcircuit in the interface element macro file.
Macro parameters are mapped in this order:
Parameters of the macro are denoted by the ampersand character (&) and are sequenced
from 1 to N.
An expression like
&1
means the first parameter. The actual parameter value is substituted
for each parameter placeholder.
The capacitor
C&1
models the loading on the analog circuitry by the digital input pin. An
expression like
C&1
helps to generate unique names because the name of the digital
destination is included as a part of the capacitor name.
Macro Parameter
Mnemonic Parameter Name
&1
Digital destination (Verilog import)
&2
Analog node (interface net)
&3
A2D_V0
&4
A2D_V1
&5
A2D_TX
Summary :
Cadence Mixed-Signal Circuit Design Environment User Guide Interface Element Macro Models October 2003 38 Product Version 5.0 .A2D &1 &2 =(&3*1) =(&4*1) =(&5*1) C&1 &2 0 0.1P The cdsSpice IE macro model, MOS1_a2d, is a macro with a digital destination and an analog terminal.
Tags :
macro,parameter,interface,digital,analog,amp1,camp1,destination,element,amp2,name,a2d,alue