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Cadence® Mixed-Signal Circuit Design Environment User Guide

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Cadence Mixed-Signal Circuit Design Environment User Guide
Interface Element Macro Models
October 2003
67
Product Version 5.0
The cdsSpice netlist formatter
s
Instantiates an interface element as an instance of the macro
s
Inherits CDF parameters for the interface element
s
Passes the digital source and interface net to the macro
s
Passes all parameters specified in cdsSpice macroArguments to the instantiation
cdsSpice Example
The following example illustrates an instantiation of an interface model.
The instantiation line in the cdsSpice raw netlist is
USE MOS1_d2a 99999 2 0 4.5 1.5n 1.1n
The digital source (
99999
) and analog node (
2
) are automatically maintained by the netlister.
After macro file substitution and macro parameter replacement, the netlist file contains the
following lines:
.D2A 99999 V199999 0 4.5 1.5n 1.1n
V199999 99999 0 PWL 0 0
R99999 99999 2 500
Models for the SpectreS Simulator
(Note that this section is applicable for CDBA, but not OA.)
The D2A interface model for the Spectre simulator in the cdsSpice socket (SpectreS
simulator) is similar to the interface model for cdsSpice and cdsSpice-compatible simulators.
Properties from CDF
cdsSpice Properties
macro = MOS1_d2a
macro reference = MOS1_d2a.S
d2a_vl = 0
&3 = 0
d2a_vh = 4.5
&4 = 4.5
d2a_tr = 1.5n
&5 = 1.5n
d2a_tf = 1.1n
&6 = 1.1n
d2a_rout = 500
&7 = 500







Summary :

Properties from CDF cdsSpice Properties macro = MOS1_d2a macro reference = MOS1_d2a.S d2a_vl = 0 &3 = 0 d2a_vh = 4.5 &4 = 4.5 d2a_tr = 1.5n &5 = 1.5n d2a_tf = 1.1n &6 = 1.1n d2a_rout = 500 &7 = 500


Tags : interface,macro,cdsspice,99999,15n,11n,simulator,instantiation,500,element,model,netlist,mos1d2a





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