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THIN FILM CIRCUIT DESIGN GUIDELINE

Document source : www.nanowavetech.com


Table 1. Substrate Material
Material
Alumina (99.5%, 99.6%); Aluminum Nitride (K=170 W/m°K);
Quartz; (Ba)TiOxide, (ZrSn)TiOxide (Er=37-39)
Wafer Size (inches)
1x1, 2.25x2.25, 4x4 (Note: Only 1x1 can be used for 5 mil thick material.)
Thickness (mils)
5, 10, 15, 20, 25 (Note: Only 15 mil or thicker material can be processed in
4x4 in. panel).
Surface finish (micro-inches) <2
µ-inches for alumina; <3 µ-inches for AlN
Table 2. Metalization Specification
Conductor layer
Gold. Typical 3 ­ 5 micron. Resistivity <10m
/sq.
Current carry capacity : 20mA/micron of trace width on alumina
Adhesion layer
TiW. 300 ­ 500A°
Resistive layer
Tantalum Nitride (TaN) 10, 25, 50, 100
/sq. TCR ­150+/-50ppm/°C.
Power Handling: 250W/in
2
on Alumina or 1000W/in
2
on AlN
Barrier layer
Nickel (if thin film is solder mounted with AuSn or AuGe). 1500-2000A°
Airbridge
Gold. 3-5 micron. Resistivity <10m/sq.
Current carry capacity : 20mA/micron of line width.
Table 3. Features and Dimension Specification (Refer to Figure 1)
Ref
Feature
Spec
A/B
Circuit Size (tolerance : +/- 0.002")
3.75" x 3.75" (max)
C
Metal Pull Back from substrate edge (Front or Back)
0.002" (min)
Edge Wraparounds:
D
Pad size from edge of via hole or cut out or castellation
0.003" (min)
E
Size of half via edge wrap
70% material thickness or .010" min.
F
Edge slot (castellation) depth
0.002" min.
G
Edge slot width
0.020" min., 0.050" max.
H
Edge slot radius
0.004" min.
Via Holes: (Placement tolerance :+/- 0.002")
I
Spacing from via edge to substrate edge
0.010" min. or 1x material thickness.
J
Via to via spacing
0.010" min. or 1x material thickness.
K
Plated Via diameter (tolerance: +/- 0.002")
0.007" min. or 70% of material thickness.
L
Pad size around via
0.003" min.
Conductor:
M/N Width / Spacing (tolerance: +/- 0.0001")
0.001" min./ 0.0004" min.
Front to Back pattern registration
+/- 0.001"
Resistor:
O Minimum
Length
0.002"
P Minimum
Width
0.002"
Length to Width ratio
1/10 min. ; 10/1 max.
Q
Resistor overlap to terminal pad
0.002" min.
R
Resistor underlap from pad
0.0005" min.
Terminal pad size
0.004"x0.004" min.
Resistor value per element
5 min.; 1k max.
Resistor sheet resistivity (ohms/sq)
10,25 50, 75, 100
Nanowave Confidential
Thin-film Guidelines/ Page 6 of 6







Summary :

Features and Dimension Specification (Refer to Figure 1) Ref Feature Spec A/B Circuit Size (tolerance : +/- 0.002") 3.75" x 3.75" (max) C Metal Pull Back from substrate edge (Front or Back) 0.002" (min) Edge Wraparounds: D Pad size from edge of via hole or cut out or castellation 0.003" (min) E Size of half via edge wrap 70% material thickness or .010" min.


Tags : edge,material,0002,width,size,pad,thickness,resistor,alumina,layer,max,tolerance,slot





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