3.5
Substrate with Plated via holes
Conductor and resistor layout are different when via holes are present in the substrate.The resistor
mask is to be laid out as selective resistor design. The conductor mask is to be laid out based on
pattern plating process
3.5.1 Laser Drilling Pattern
A sketch of the via hole pattern with hole locations and dimensions should be generated for hole
drilling.
3.5.1.1
Minimum hole diameter: 70% of substrate thickness
3.5.1.2
Minimum distance between hole edges: One substrate thickness or 10 mil minimum.
3.5.1.3
Minumum distance from edge of hole to circuit edge:
One substrate thickness or 10 mil minimum. Not applicable for metal wrap-around structure.
3.5.2
Orientation
As shown in Fig. 3, three 0.006" holes are to be drilled in the lower left hand corner in the y
direction to identify the front side pattern orientation. Subsequent photomask patterns should be
designed to this orientation.
6
mil diameter hole. 50 mils from substrate edges and 50 mils apart.
Fig. 3 Substrate orientation
3.5.3 Alignment
An 0.006" alignment hole shall be incorporated for aligning the first photomask pattern. The
alignment holes shall be centered to the via hole alignment mark on the first mask in the dicing
channel (see Fig. 6).
Nanowave Confidential
Thin-film Guidelines/ Page 13 of 13
Summary :
3.5 Substrate with Plated via holes Conductor and resistor layout are different when via holes are present in the substrate.The resistor mask is to be laid out as selective resistor design. The conductor mask is to be laid out based on pattern plating process 3.5.1 Laser Drilling Pattern A sketch of the via hole pattern with hole locations and dimensions should be generated for hole drilling.
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