Design Entry Techniques
CPLD Schematic Design Guide
2-7
3.
Then select
Basic Options
4.
Place a check on the
Off
box adjacent to
Use Global Clocks
.
If global clock optimization is disabled, IBUF inputs used as clocks
always pass through the logic array. You can still use BUFG symbols
or the BUFG=CLK attribute to explicitly specify global clock inputs.
Output Enable Signals
To use a device input to control tristate device outputs, you can
simply connect an IBUF to the enable/disable input of one or more
OBUFE or OBUFT symbols in your design. The fitter automatically
uses one of the global tristate control pins (GTS) of the CPLD when-
ever possible.
A global tristate control input signal may pass through an inverter or
control the disable input (T) of an OBUFT symbol to perform an
active-low output-enable. The same tristate control input may even
be used both inverted and non-inverted to enable alternate groups of
device outputs, as shown in the "Input OE2 can be Optimized onto a
Global Tristate Control Pin (GTS)" figure. Global tristate control
inputs may also be used as ordinary input signals to other logic else-
where in the design.
Summary :
The same tristate control input may even be used both inverted and non-inverted to enable alternate groups of device outputs, as shown in the "Input OE2 can be Optimized onto a Global Tristate Control Pin (GTS)" figure.
Tags :
input,global,control,tristate,design,use,inputs,deice,used,signals,obuft,enable,cpld