CPLD Schematic Design Guide
2-20
Xilinx Development System
only device-independent symbols common to multiple families.
If required by your CAE tool, identify the terminal nodes of the
macro schematic sheet.
2.
Create a symbol for the schematic. The names of pins on your
symbol should match the names of the terminal nodes in the
underlying schematic.
3.
Make sure the symbol is defined as a hierarchical symbol (some-
times called "composite") as required by your CAE tool.
Custom Macro Example for Viewlogic
This next example shows you how to create a custom macro symbol
with an underlying schematic. The steps for Viewlogic users are
shown:
1.
Create the schematic using common symbols from the CPLD
library. For this example, we create a schematic named regxor,
which should look something like this:
Figure 2-8
The REGXOR Schematic
2.
Create a symbol, also named regxor, with pin names that match
the inputs and outputs of the schematic.
X4839
D
I0
XOR2
I1
CLK
FD
C
Q
Summary :
CPLD Schematic Design Guide 2-20 Xilinx Development System only device-independent symbols common to multiple families. For this example, we create a schematic named regxor, which should look something like this: Figure 2-8 The REGXOR Schematic 2.
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schematic,symbol,create,example,macro,regxor,names,underlying,match,cae,cpld,named,terminal