CPLD Schematic Design Guide
3-4
Xilinx Development System
multiple output signals. The PWR_MODE attribute affects all macro-
cells used to implement the selected component.
If a component such as a logic gate or inverter is collapsed into
another component, the PWR_MODE attribute is not carried forward
by the software. You may therefore need to apply the PWR_MODE
attribute to several components in a logic path to be sure that all
macrocells used to implement the path are set to low-power mode.
The PWR_MODE attribute has no effect on components that are not
implemented using macrocell logic, such as I/O buffers.
Changing Global Power Mode
To set all macrocells to the Low Power Mode throughout the design,
set
Macrocell Power Setting
to
Low
in the
Basic
menu of
the
Implementation Options Template
in the Design
Manager.
By setting the Power Mode to
Low
in the template, macrocells will
operate in low power mode except where you specify the
PWR_MODE=STD attributes in the design.
If you want the fitter to automatically select the power mode for indi-
vidual macrocells based on timing constraints you enter for your
design, set
Macrocell Power Setting
to
Timing Driven
.
Macrocells involved in timing-constrained paths will have their
power settings automatically switched to
Low
only if the low-power
propagation delay still allows the macrocell to satisfy all applicable
timing constraints. Macrocells that do not participate in timing-
constraint paths will operate in standard power mode (
Std
).
Applying the PWR_MODE attribute always overrides the
Macro-
cell Power Setting
.
Note:
Low-power macrocells are slower than standard-power
outputs. If you have a mixture of low- and standard-power macro-
cells, pay close attention to simulation results or the timing report to
see how the power settings affect timing interactions.
Controlling Output Slew Rate
Each output of a CPLD device is programmable to operate either at
full speed or with limited slew rate. Limiting the slew rate reduces
output switching surges in the device. Slew rate control becomes