CPLD Schematic Design Guide
3-12
Xilinx Development System
Applying the following attribute to a logic symbol or net in the
middle of a logic function prevents collapsing of that logic node into
its fan-outs:
KEEP
You can use KEEP to break logic chains in non-speed-critical paths
and prevent those functions from collapsing and using too many p-
terms. If you set the p-term limit parameter too high and your design
no longer fits, try using KEEP to reduce the size of selected non-crit-
ical paths.
The KEEP attribute has no effect on any symbol that contains no
macrocell logic, such as an I/O buffer.
When the KEEP attribute is placed on a symbol, it inhibits logic opti-
mization on all macrocells used to implement the symbol. For
example, if you place KEEP on a macro symbol (like D2_4E), all
outputs and internal nodes of the decoder will be prevented from
collapsing. This is usually not desirable.
If you want to prevent collapsing on a specific output signal from a
macro symbol, you can place the KEEP attribute on the net itself.
When you place the KEEP attribute on a net, the fitter applies the
attribute only to the primitive symbol that drives that net.
Forcing Collapsing of a Logic Node
You can also force a logic symbol to collapse into all of its fanouts by
placing the following attribute on the symbol or its output net:
COLLAPSE
The collapse attribute affects all logic functions contained within a
symbol. If you want to force collapsing of a multi-symbol logic chain,
you may need to use multiple collapse attributes.
Multilevel Logic Optimization
Multilevel Logic Optimization seeks to simplify the total number of
logic expressions in a design, and then collapse the logic in order to
meet user objectives such as density, speed and timespecs. This opti-
mization targets CPLD architecture, making it possible to collapse to
the macrocell limits, reduce levels of logic, and minimize the total
number of pterms.