CPLD Schematic Design Guide

CPLD Schematic Design Guide B-2 Xilinx Development System Figure B-1 CPLD Schematic Components XORs XOR2 XOR3 XOR4 XOR5 XOR6 XOR7 XOR8 XOR9 XNORs* XNOR2 XNOR3 XNOR5 XNOR6 XNOR8 XNOR4 XNOR7 XNOR9 SOP4B4 SOP4B3 SOP4B2B SOP4B2A SOP4B1 SOP4 SOP3B3 SOP3B2B SOP3B2A SOP3B1B SOP3B1A SOP3 Sum of Products* AND2B1 AND3B1 AND4B1 AND5B1 AND7 AND2B2 AND3B2 AND4B2 AND5B2 AND3B3 AND4B3 AND5B3 AND4B4 AND5B4 AND5B5 AND2 AND3 AND4 AND5 AND6 AND8 AND9 ANDs* NAND4B4 NAND5B4 NAND5B5 NAND2 NAND3 NAND4 NAND5 NAND6 NAND2B1 NAND3B1 NAND4B1 NAND5B1 NAND7 NAND8 NAND2B2 NAND3B2 NAND4B2 NAND5B2 NAND5B3 NAND3B3 NAND4B3 NAND9 NANDs* OR2 OR2B1 OR2B2 OR3 OR3B1 OR3B2 OR3B3 OR4 OR4B1 OR4B2 OR4B3 OR4B4 OR5 OR5B1 OR5B2 OR5B3 OR5B4 OR5B5 OR6 OR7 OR8 OR9 ORs* NOR3B3 NOR4B3 NOR5B3 NOR8 NOR2 NOR3 NOR4 NOR5 NOR6 NOR2B1 NOR3B1 NOR4B1 NOR5B1 NOR7 NOR2B2 NOR3B2 NOR4B2 NOR5B2 NOR5B5 NOR9 NOR4B4 NOR5B4 NORs* X8267