# MODELING AND SIMULATION FOR RF SYSTEM DESIGN

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88 Chapter
6
Figure 6-25 shows the result of the simulation (node voltages at N_IN
and N_OUT).
Figure 6-25.
Input and output voltages versus time
We can represent the output voltage versus input voltage and obtain the
A-law characteristic for A=87.56.
Figure 6-26.
A-law characteristic
6.3.5
Attributes in VHDL-AMS
What is an attribute in VHDL-AMS?
An attribute is a definition of some characteristic of a named object.
Some attributes are predefined for types, ranges, values, signals, quantities,
and functions. A predefined attribute may return a constant value, a type, or

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Summary :

## 88 Chapter 6 Figure 6-25 shows the result of the simulation (node voltages at N_IN and N_OUT).

Tags : figure,characteristic,attribute,ersus,predefined,output,625,oltages,hdlams,alaw,oltage,input,attributes
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