9.7. GENERAL RULES OF THUMB TO FOLLOW WHEN
DESIGNING A SYSTEM
As high-speed digital systems become more complex, it is becoming increasingly difficult to
manage timings and signal integrity. The following list is in no particular order, but if followed,
will hopefully make the design process a little simpler:
1. Early discussions between the silicon and system designers should be held to choose
the best compromise between die ball-out and package pin-out. Often, the die ball-
out is chosen without consideration of the system design. The package pin-out is very
dependent on the die ball-out, and an inadequate package pin-out can cause severe
difficulties in system design. Many designs have failed because of inadequate
package pin-out.
2. When designing a system, make certain that the reference planes are kept continuous
between packages, PCBs, and daughtercards. For example, if a package trace is
referenced to a V
DD
plane, be certain that the PCB trace that it is connected to is also
referenced to a V
DD
plane. Often, this is not possible because of package pin-out.
This has been the cause of several failures. It is very expensive to redesign a board
and/or a package to fix a broken design.
3. Be certain that a strobe and its corresponding data are routed on the same layer.
Since different layers can experience the full process variations, this can cause
significant signal integrity problems.
4. Be certain that any scripts written to automate the sweeping function are working
properly.
5. Make a significant effort to understand the design. Do not fall into the trap of designing
by simulation. Calculate the response of some simplified topologies by hand using the
techniques outlined in this book. Make certain that the calculations match the
simulation. This will provide a huge amount of insight, will significantly help
troubleshoot problems, and will expedite the design process.
6. Look at your waveforms! This may be the most important piece of advice. All too often,
I have seen engineers performing huge numbers of parameter sweeps, looking at the
three-dimensional plots and defining a solution space. This does not allow for an
intimate understanding of the bus and often leads to an ill-defined solution space,
wasting an incredible amount of time. Furthermore, when a part is delivered that does
not meet the initial specifications, or a portion of the design changes, the engineer
may not understand the impact to the design. It is important to develop and maintain
basic engineering skills and not use algorithms in place of engineering. Double check
your sweep results by spot checking the waveforms.
7. Keep tight communication with all disciplines, such as EMI and thermal.
8. Plan your design flow from simple to complicated. Initiate your design by performing
hand calculations on a simplified topology. Increase the complexity of the simulations
by adding one effect at a time so that the impact can be understood. Do not move on
until the impact of each variable is understood.
9. Compensate for long package traces by skewing the motherboard routing lengths.
When matching trace lengths to minimize skew, it is important that the electrical
length from the driver pad (on the silicon) to the receiver pad be equal. If there is a
large variation in package trace lengths, it is usually necessary to match the lengths
by skewing the board traces. Subsequently, the total paths from silicon to silicon are
equal lengths.