Synchronous data transmission systems not only require frame alignment, but also must
be bit-aligned. This was an easy matter on startstop systems because we could let the
receive clock run freely inside the 5 bits or 8 bits of a character. There is no such freedom
with synchronous systems. Suppose we assume a free-running receive clock. However, if
there was a timing error of 1% between the transmit and receive clocks, not more than 100
bits could be transmitted until the synchronous receiving device would be off in timing
by the duration of 1 bit from the transmitter, and all bits received thereafter would be in
error. Even if the timing accuracy of one relative to the other were improved to 0.05%,
the correct timing relationship between transmitter and receiver would exist for only
the first 2000 bits transmitted. It follows, therefore, that no timing error whatsoever can
be permitted to accumulate since anything but absolute accuracy in timing would cause
eventual malfunctioning. In practice, the receiver is provided with an accurate clock that
is corrected by small adjustments based on the transitions of the received bit stream, as
explained in Section 10.7.3.
All currently used data-transmission systems are synchronized in phase and symbol rate
in some manner. Startstop synchronization has already been discussed. All fully syn-
chronous transmission systems have timing generators or clocks to maintain stability. The
transmitting device and its companion receiver at the far end of the circuit must maintain
a timing system. In normal practice, the transmitter is the master clock of the system. The
receiver also has a clock that in every case is corrected by some means to its transmitter's
master clock equivalent at the far end.
Another important timing factor is the time it takes a signal to travel from the transmitter
to the receiver. This is called propagation time. With velocities of propagation as low as
20,000 mi/sec, consider a circuit 200 mi in length. The propagation time would then be
200/20,000 sec or 10 msec. Ten milliseconds is the time duration of 1 bit at a data rate
of 100 bps; thus the receiver in this case must delay its clock by 10 msec to be in step
with its incoming signal. Temperature and other variations in the medium may also affect
this delay, as well as variations in the transmitter master clock.
There are basically three methods of overcoming these problems. One is to provide
a separate synchronizing circuit to slave the receiver to the transmitter's master clock.
However, this wastes bandwidth by expending a voice channel or subcarrier just for
timing. A second method, which was quite widely used until twenty years ago, was to
add a special synchronizing pulse for groupings of information pulses, usually for each
character. This method was similar to startstop synchronization, and lost its appeal
largely because of the wasted information capacity for synchronizing. The most prevalent
system in use today is one that uses transition timing, where the receiving device is
automatically adjusted to the signaling rate of the transmitter by sampling the transitions
of the incoming pulses. This type of timing offers may advantages, particularly automatic
compensation for variations in propagation time. With this type of synchronization the
receiver determines the average repetition rate and phase of the incoming signal transition
and adjusts its own clock accordingly by means of a phase-locked loop.
In digital transmission the concept of a transition is very important. The transition
is what really carries the information. In binary systems the space-to-mark and mark-to-
space transitions (or lack of transitions) placed in a time reference contain the information.
In sophisticated systems, decision circuits regenerate and retime the pulses on the occur-
rence of a transition. Unlike decision circuits, timing circuits that reshape a pulse when
a transition takes place must have a memory in case a long series of marks or spaces is